Jingren Wang (王靖仁)

I am a Ph.D. student in Microelectronics at the Hong Kong University of Science and Technology (Guangzhou), jointly advised by Professor Hongce Zhang and Professor Shiju Lin. My research focuses on logic synthesis and other topics in EDA.

Prior to my doctoral studies, I worked as a Synthesis Engineer in the R&D department at Raina Technology in Hangzhou, China. I hold a background in Computing Science from the University of Glasgow, where I was supervised by Dr. Vikraman Choudhury, and in cyber engineering from Xidian University.

Contact

Email jwang929 AT connect DOT hkust-gz DOT edu DOT cn
Office Address 118, W4, 5th Floor
Microelectronics Thrust,
Function Hub, HKUST(GZ)
Guangzhou, Guangdong
China
GitHub wjrforcyber
Mastodon @jingrenwang@mathstodon.xyz

About Me

I am interested in logic synthesis, Boolean algebra, and electronic design automation (EDA). My current work explores technology-independent optimization techniques for combinational logic circuits, with an emphasis on intermediate representations and the structural properties that enable efficient synthesis.

Talks

Course Talks

Thesis Talks

Publications

1. Inverter Redistribution through Self-Dual and Self-Anti-Dual Function Transformation with Jingren Wang, Guangyu Hu, Shiju Lin, and Hongce Zhang , International Workshop on Logic & Synthesis (IWLS) 2026 (arxiv)
2. Bounded Dynamic Level Maintenance for Efficient Logic Optimization with Junfeng Liu, Qinghua Zhao, Liwei Ni, Jingren Wang, Biwei Xie, Xingquan Li, Bei Yu, and Shuai Ma , IEEE Transactions on Computers 2026 (doi, arxiv)

Teaching

Posts